IOxOS Technologies SA releases the industry’s first PCI Express to VME64x Bridge Intellectual Property (IP) core for FPGA and Structured ASIC technologies.

IOxOS Technologies SA releases the industry's first PCI Express to VME64x Bridge Intellectual Property (IP) core for FPGA and Structured ASIC technologies.

Gland, Switzerland, October 2008 - The PCIe2VME64 IP core is optimized to target any FPGA or Structured ASIC device embedding PCI Express Endpoint capabilities, and does not depend on any third party IP. The first version is now available for Xilinx Virtex-5 T devices, and a new version targeting Altera Stratix IV GX and HardCopy IV GX will be released in Q1/2009.

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IOxOS Technologies has developed this IP core to offer a full VME64x Master/Slave interface with Slot-1 function and Interrupt Management (7-level Interrupt Handler/Requester) with a direct bridge to PCI Express upstream port, assuring an extremely low latency (an order of magnitude less compared to other bridged solutions) combined with a high data bandwidth. Advanced VME64x data transport 2eVME & 2eSST is natively supported with maximal burst length capability. Large data-transaction buffers guarantee maximal 2eSST data transfer support for continuous operation. A key element for this high performance is an embedded 4-channel Intelligent DMA Controller (IDMAC) which allows high bandwidth simultaneous R/W transactions (several GBytes/s) among VME64x, PCI Express, an integrated DDR2 memory controller and a fourth agent that can be customized by the end user.

The PCIe2VME64 IP core incorporates other advanced features, such as SR-IOV and MR-IOV capabilities (PCI-SIG specification), in order to support Single or Multi Root I/O , which is a key element for the upcoming generation of microprocessors and embedded systems.

IOxOS Technologies distributes its PCIe2VME64 IP core either in a pre-configured binary format or by delivering the full source code together with a set of test-benches and Bus Functional Models, setting up the IOxOS Designer Kit, a comprehensive FPGA design environment which provides full visibility and facilitates the integration of user applications and additional features such as . The IOxOS FPGA Designer Kit is built around an embedded user area tightly coupled with all the PCIe2VME64 IP core resources, taking advantage of its optimized central switched architecture. IOxOS Technologies also provides an evaluation platform to dramatically reduce the user application development time.

IOxOS Technologies, with its long and proven experience in VME64x design, will provide consultancy services to guide the end customer throughout the system integration process, considering the possibility of customizing the PCIe2VME64 IP core upon request.

On account of its VHDL source code availability and multi-platform architecture, the PCIe2VME64 IP core is an excellent solution for military and aerospace applications where -proof implementations, long life cycles and design flexibility are more than required.

For further information, please contact info@ioxos.ch